The transition from Near Package Copper (NPC) to Co-Packaged Optics (CPO) is driven by the increasing bandwidth demands of AI/ML applications, with some adoption expected at 200G/Lane and becoming essential at 400G/Lane. Industry roadmaps indicate that CPO-based Switch ASICs will enter high-volume manufacturing (HVM) in 2027, followed by HPC devices in 2028. Advancements in packaging technology and scalable fiber attachment solutions, moving from "fiber-last" to detachable methods, are pivotal in facilitating this shift. The competitive landscape currently features numerous connector solutions, but only a few are expected to achieve widespread adoption. A significant challenge remains in the testability of assembled devices, as efficient, reliable, and cost effective approaches must be applied for simultaneous electrical and optical connection to the assembled devices. Achieving HVM scalability necessitates alignment with existing assembly and test procedures, as massive retooling is not a viable option for meeting the schedule demands for this ramp. In response to these challenges, Advantest is developing truly HVM-scalable solutions at both Final Test and System Level Test for detachable connector-based CPO devices, for HPC and Switch ASIC applications.
