Through-Silicon Vias (TSVs) are a cornerstone of modern 3D integrated systems, where structural uniformity is critical for performance, reliability, and test yield. Traditional metrology approaches either sacrifice speed for precision or fail to offer actionable insights into which structural metrics correlate most strongly with out-of-spec behavior. In this work, we present a novel correlative microscopy and characterization framework that enables quantitative, high-precision, and accelerated metrology for wafer-scale TSV array testing. The innovation lies in our time-sequenced, correlative imaging strategy that systematically combines confocal microscopy, brightfield imaging, scanning electron microscopy (SEM), X-ray computed tomography (XCT), and cross-sectional analysis to determine the most relevant features for specification compliance. Rather than relying on a single modality or performing exhaustive measurement on all structures, we correlate the multi-modal data to identify which features matter most—both statistically and physically—for determining whether a given TSV is in or out of specification. This correlation allows us to optimize the imaging and measurement pipeline, reducing redundant modalities and streamlining the process while maintaining sub-micron accuracy. We developed an automated metrology pipeline using fast confocal scanning paired with a Python-based ellipse-fitting algorithm, tuned to handle debris, chip-outs, and shape distortions. Early-stage correlation studies with SEM and cross-sections informed how the final pipeline could rely primarily on brightfield or confocal imaging, significantly improving throughput. A dynamic autofocus method based on Laplacian variance allows robust imaging over large wafer regions, cutting imaging time significantly. We validate our approach on fabricated TSV arrays, achieving sub-0.1 µm resolution and mapping compliance trends across entire wafers. We also introduce new wafer-scale visualization tools to localize process variations and test-critical failures. These include heat maps that highlight only the features responsible for pushing a die out of specification, supporting data-driven test decisions and yield learning. By prioritizing data modalities through correlative insight, this work bridges the gap between precision lab-scale metrology and fast inline test applications. It offers a practical and scalable path for test-aware metrology in TSV-based devices, enabling better test optimization, early defect screening, and ultimately more robust 3D integrated systems.
