Josephson Junctions with high thermal stability for Superconducting Digital Logic

Superconducting Digital Logic (SDL) leverages the zero-resistance current flow for memory and computing applications. This not only boosts the energy efficiency of a processing unit, but also enhances the number of operations cycles a device can be subjected to. One of the key challenges for the integration of SDL into the present CMOS based environment is the ability of Josephson Junctions (a fundamental device in SDL and cryogenic memories) to withstand high temperature processes that the CMOS requires during the manufacturing stage. Passivation of Si/SiO2 defects in CMOS usually require annealing temperatures as high as 350-450°C,whereas the widely used Josephson junctions today show a degradation in the critical current as the annealing temperatures exceed 240°C. In this work, we present newly engineered Josephson Junction stack-structures that demonstrate a critical current post annealing at 330°C. Electrical characterization (both at room temperature and cryogenic temperatures) were carried out along with routine de-fluxing sequence across multiple devices to confirm stable and reliable I–V switching and reproducible critical current densities. The devices also show high re-producibility in terms of stability over time and technologically relevant characteristic voltage, making them suitable in practical ASIC integration with current technology. This work was supported in part by the Army Research Office.