A digital twin ecosystem to propel domestic semiconductor manufacturing

We present findings from experts from industry, academia and government that collaborated through 2024 to compete for the NIST CHIPS Manufacturing Innovation Institute, which was awarded to SMART USA last November. Our efforts brought together 552 participants representing 126 organizations, convening three in-person workshops and weekly working group meetings to create a comprehensive roadmap to build and mature digital twin technologies for semiconductor manufacturing. The resulting technical and transition concepts and roadmap provide guidance for enhancing success in increasing the domestic footprint of semiconductor manufacturing.

A typical semiconductor manufacturing flow involves thousands of process steps, each generating data often from hundreds of sensors on each machine. Traditional modeling cannot keep pace with the increasing complexity of the tools, processes, flows, and metrology, motivating industry’s interest in developing digital twins. One key differentiating characteristic of a digital twin versus a model is the periodic updating of the twin with real world data. Digital twin technologies are becoming ever more important as an active semantic layer for AI reasoning on data, as well as a mechanism to generate synthetic data for machine learning. The integration of digital twins with AI into end-to-end manufacturing flows holds promise for fab co-optimization and accelerated innovation, particularly in addressing latency in new CMOS technology node introduction and its associated production ramp. Further, interconnected digital twins of materials, products, tools, processes and fabs provide a framework upon which to better manage and orchestrate supply chains for resilience to geopolitical disruptions and natural disasters.

While the motivation outlined above is compelling, only some aspects of functionalities and bidirectional links between physical and virtual worlds are being realized. Current efforts on digital twins are fragmented, yielding disparate, siloed simulators, emulators, and the occasional sensor-driven metrology or condition models of tools or processes. In fact, several barriers inhibit development of interoperable digital twins that support the integrative virtual-physical infrastructure envisioned to meet the opportunities mentioned above. As an example, semiconductor manufacturing fabs are highly integrated systems of hundreds of interacting subsystems whose underlying physics are often prohibitively intractable—fundamentally hampering efforts to pervasively realize digital twin capabilities at unit-tool levels, let alone at a process flow level. The existing condition-monitoring solutions are, at best, used only locally to manage the relevant tool or some consumable component on that tool and are not yet used to optimize operational decision making at the fab level.

Our recommendations for technical development of digital twins center on six major areas: 1) accurate, predictive and extensible modeling and simulation, 2) advanced sensing and metrology, 3) bidirectional virtual-physical interaction, 4) interoperability and interlinking in process flows, 5) hierarchy to handle system complexity and 6) cybersecurity. Development of open-source semiconductor digital twin standards, software toolkits, reference models, and integrative AI infrastructure built around these principles is equally important to realize the promise of interoperable digital twins that address enterprise-scale opportunities. A final aspect to cover is digital twins specifically tailored to enable effective and engaging curriculum in order to scale workforce training with better and faster learning outcomes.