In the realm of semiconductor manufacturing, the accurate identification of BCDE and D-square marks on the wafer is a fundamental step in the imaging toolset, serving as a cornerstone for subsequent processes. These marks are critical for ensuring precise alignment and measurement, yet they frequently encounter challenges during chip production. Issues such as being washed away or partially lost can significantly degrade imaging quality, posing substantial obstacles to maintaining high precision in manufacturing operations. Our Logic Technology Development (LTD) Yield Failure Analysis (FA) and Metrology group has long relied on automation processes, leveraging advanced Artificial Intelligence (AI) models from Cognex to locate BCDE marks efficiently. These models have been instrumental in streamlining operations and enhancing productivity. However, as the complexity of processing has increased and die sizes have evolved, the incidence of deformed target marks has risen, leading to a higher false positive (FP) rate in existing models. This increase in FP rates has underscored the need for more robust solutions to maintain the integrity of imaging processes. To address these challenges, we initially explored the use of sequential imaging with low and high magnification, applying different models to each. Despite our efforts, this approach did not yield the significant improvements we anticipated. Recognizing the need for a more effective solution, we embarked on developing a novel dual-model approach. This method involves two key innovations: first, the integration of multiple features into a single model, ensuring that even if part of the target image is compromised, the model can still accurately identify the marks using other features. Second, we implemented a technique to crop the target feature from one image and apply a new model to more precisely locate the D-square. By applying these two models consecutively to a single low magnification image set, we achieved a dramatic reduction in the FP rate by approximately 20%. This improvement has led to a high success rate of over 95%, significantly enhancing the reliability of our automation process. The dual-model approach not only addresses the challenges posed by increased processing complexity and changing die sizes but also provides a more reliable foundation for imaging precision. This advancement represents a significant step forward in semiconductor manufacturing, offering a robust solution to the persistent challenges of mark detection. As the industry continues to evolve, the ability to maintain high precision in imaging processes will be crucial for sustaining competitive manufacturing capabilities. Our dual-model approach exemplifies the innovative strategies necessary to meet these demands, paving the way for future enhancements in process optimization and yield improvement.
