The complex nature of today’s heterogenous semiconductor devices with advanced die stacking assemblies and complex interconnect schemes are driving a new era of quality requirements that are not achievable with wafer level testing alone. The need for Singulated Die Test (SDT) with Active Thermal Control (ATC) is driven by quality and cost requirements. SDT has now proven necessary, credible and ready for volume production deployment.
Defects in complex silicon assemblies sometimes do not manifest until after a wafer is singulated into the various die or die stacks, and precision test temperature control during die test is increasingly important. Over or under testing die along with complex defect issues can create tremendous cost increases for chiplet based semiconductor manufactures.
Numerous challenges with traditional wafer-probe on high performance digital devices are now being overcome with SDT using the Advantest HA1200. Recent successes with SDT demonstrate the capabilities of this critical technology, which are beneficial for testing today's advanced chiplet based semiconductor devices. Production throughput, probe burn avoidance, multi-site efficiency gains and yield improvements through fast reacting thermal control matching Final Test conditions are now available.
This presentation addresses the various trade-offs between wafer probe and SDT, successes with ATC on SDT using tJ feedback, along with the high-volume manufacturing readiness status and implementation considerations for SDT. The trade-offs between wafer-probe and singulated die probe must be carefully considered.
